Product Summary

The PM73487 622 Mbps ATM Traffic Management Device (QRT is an advanced communications device capable of supporting very large,
high-performance ATM switching systems. The rich feature set of the QRT enables systems to offer many sophisticated network services.
The QRT provides 622 Mbps UTOPIA (Level 1 or Level 2) access to switch fabrics composed of PM73488 5 Gbps ATM Switch Fabric Elements (QSEs). Together, these devices can be used to build architectures with capacities from 622 Mbps to 160 Gbps. The QRT can also act as a standalone 622 Mbps switch.The QRT/QSE architecture virtually eliminates head-of-line blocking by means of the QRT perVirtual Channel (VC) receive queues and congestion feedback from the QSE switch fabric. The distributed architecture acts as an output-buffered switch by incorporating Evil Twin Switching (a congestion-reducing routing algorithm in the switch fabric) and a speed-up factor in the switch fabric (running the fabric faster than the line rate).
The QRT uses per-VC receive queues, 64 receive Service Classes (SCs), and 16 transmit SCs per each of the 31 Virtual Outputs (VOs) to enable flexible multi-priority scheduling algorithms. The scheduler can be used to ensure Quality-of-Service (QoS) guarantees for Constant Bit Rate
(CBR), Variable Bit Rate (VBR), and Unspecified Bit Rate (UBR) VCs. The QRT also provides five separate congestion thresholds, each with hysteresis, that selectively control AAL5 Early Packet Discard (EPD) and/or Cell Loss Priority (CLP)-based cell dropping for UBR support.
Additional highlights of the QRT include full Virtual Path Indicator (VPI)/Virtual Channel Indicator (VCI) header translation, separate input and output cell buffers (up to 64K each), Virtual Path (VP)/VC switching, and support for up to 16K VCs on both the receive and transmit sides.
PMC-Sierra also offers the QRT Device Control Package, which is a software package that harnesses the QRT rich feature set and shortens system development times.

Features

(1) Receive.
(2) Maintains 64 weighted, bandwidth-controlled SCs with per-VC queues.
(3) Provides round-robin servicing of queues within each SC.
(4) Provides per-channel (VP or VC), per-SC, and per-direction congested and maximum
(5) queue depth limits.
(6) Provides up to 64K cell buffers
(7) Transmit.
(8) Provides 31 VOs.
(9) Maintains 16 SCs for each VO with per-VC accounting
(10)Provides per-channel (VP or VC), per-SC Queue (SCQ), per-SC, per-VO, and perdirection congested and maximum queue depth limits.
(11) Provides up to 64K cell buffers
(12)CONGESTION MANAGEMENT ALGORITHMS.
(13) Supports EPD and Partial Packet Discard (PPD) for UBR traffic, and as a backup for ABR
(14)traffic.
(15) Supports CLP-based cell discard and Explicit Forward Congestion Indicator (EFCI) cell
(16)marking.; (19) Supports three congestion limits (as well as EPD, CLP, and EFCI, and/or backpressure)
(17)for logical multicast on the transmit side.
(18)SWITCHING; (22)Supports VC and VP switching.
(19) Supports up to 16K VCs.; (24)ADDRESS MAPPING
(20)Supports all 12 VP and 16 VC bits through use of a double, indirect lookup table.
(21) Performs header translation at both the input (receive) and output (transmit) directions.
(22)Input header translation is used to pass the output queue channel number through the
(23)switch.
(24)MULTICAST
(25) Supports logical multicast with a superior queue-clearing algorithm.

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