(China (Mainland))
Product Summary
The EP3C10F256I7N EPLD has a versatile macrocell structure and I/O architecture, which allow them to implement high performance logic functions effectively. The EP3C10F256I7N input and macrocell features are a superset of features offered by PAL/GAL devices. Therefore, EP3C10F256I7N devices can be used as an alternative to multiple PAL/GAL devices, SSI and MSI logic devices, or low-end gate arrays.
Parametrics
EP3C10F256I7N absolute maximum ratings: (1)Supply voltage：–2.0V to 7.0V; (2)DC input voltage: –0.5V to VCC+0.5V; (3)Storage temperature: –65°C to 150°C; (4)Ambient temperature: –10°C to 85°C.
Features
EP3C10F256I7N features: (1)Multiple 20-pin PAL and GAL replacement and integration; (2)Device erasure and reprogramming with advanced, nonvolatile; (3)EPROM configuration elements;(4)Programmable registers providing D, T, JK, and SR flipflops with; (5)individual Clear and Clock controls; (6)Dual feedback on all macrocells for implementing buried registers with bidirectional I/O;(7)Programmable-AND/allocatable-OR structure allowing up to 16 product terms per macrocell; (8)Two product terms on all macrocell control signals; (9)Programmable inputs (8 in EP312, 10 in EP324) configurable as; (10)latches, registers, or flow-through input;(11)Available in windowed ceramic and one-time programmable (OTP).
Diagrams
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 EP3C10F256I7N |
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IC CYCLONE III FPGA 10K 256 FBGA |
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EP3C10E144C7 |
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IC CYCLONE III FPGA 10K 144-EQFP |
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EP3C10E144C7N |
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IC CYCLONE III FPGA 10K 144-EQFP |
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EP3C10E144C8 |
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IC CYCLONE III FPGA 10K 144-EQFP |
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EP3C10E144C8N |
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IC CYCLONE III FPGA 10K 144-EQFP |
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EP3C10E144I7 |
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IC CYCLONE III FPGA 10K 144 EQFP |
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EP3C10E144I7N |
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IC CYCLONE III FPGA 10K 144 EQFP |
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